Across 200 sampled CPU payload reads, `p1_wd_reduces_gap_all_widths` stayed 1 while `p2_early_equals_always_all_widths`, `p3_late_equals_no_wd_all_widths`, and `critical_period_timing_confirmed` stayed 0 throughout. In the width-32 slices, the no-WD gap usually sat around 0.64 to 0.76, always-WD dropped much lower around 0.24 to 0.52, early-only WD stayed high around 0.66 to 0.84, late WD tracked the always-WD regime around 0.27 to 0.54, and brief WD also stayed closer to the large-gap side around 0.59 to 0.79.